environment["ti.bios.oldMemoryNames"] = true;

/* loading the generic platform */
var params = {};
params.clockRate = 1000;
params.deviceName = "6415";
params.catalogName = "ti.catalog.c6000";
params.regs = {};
params.regs.l2Mode = "4-way cache (0k)";
utils.loadPlatform("ti.platforms.generic", params);


/* enabling DSP/BIOS components */
bios.GBL.ENABLEINST = true;
bios.MEM.NOMEMORYHEAPS = false;
bios.RTDX.ENABLERTDX = true;
bios.HST.HOSTLINKTYPE = "RTDX";
bios.TSK.ENABLETSK = true;
bios.GBL.ENABLEALLTRC = true;

bios.GBL.ENDIANMODE = "little";

bios.GBL.C641XCONFIGUREL2 = true;
bios.ISRAM.createHeap = true;
bios.ISRAM.heapSize = 0x8000;

bios.MEM.BIOSOBJSEG = prog.get("ISRAM");
bios.MEM.MALLOCSEG = prog.get("ISRAM");
bios.TSK.STACKSEG = prog.get("ISRAM");


/* applying user changes */
bios.SDRAM1 = bios.MEM.create("SDRAM1");

bios.SDRAM1.comment = "SDRAM EMIF A CE2";

bios.SDRAM1.base = 0xa0000000;

bios.SDRAM1.len = 0xfff8000;

bios.SDRAM1.heapSize = 0xcff8000;

bios.SDRAM1.space = "code/data";

bios.PRD_NDK = bios.PRD.create("PRD_NDK");

bios.TSK_Main = bios.TSK.create("TSK_Main");

bios.trace = bios.LOG.create("trace");

bios.HOOK_NDK = bios.HOOK.create("HOOK_NDK");

bios.LOG_system.bufSeg = prog.get("SDRAM1");

bios.LOG_system.bufLen = 0x800;

bios.MEM.REUSECODESPACE = 1;

bios.MEM.STACKSIZE = 0xe000;

bios.MEM.USERCOMMANDFILE = 1;

bios.MEM.BIOSOBJSEG = prog.get("SDRAM1");

bios.MEM.MALLOCSEG = prog.get("SDRAM1");

bios.GBL.C641XMARCE2 = 0xffff;

bios.GBL.C641XMAREMIFB = 0x10;

bios.GBL.C641XCCFGL2MODE = "4-way cache (256k)";

bios.ISRAM.len = 0xc0000;

bios.ISRAM.heapSize = 0x10000;

bios.PRD_NDK.period = 0x64;

bios.PRD_NDK.fxn = prog.extern("llTimerTick");

bios.PRD_NDK.order = 0x2;

bios.HST.HOSTLINKTYPE = "NONE";

bios.TSK.STACKSEG = prog.get("SDRAM1");

bios.TSK_Main.comment = "MainTask";

bios.TSK_Main.fxn = prog.extern("task_main");

bios.TSK_Main.stackSize = 0x4000;

bios.TSK_Main.stackMemSeg = prog.get("ISRAM");

bios.TSK_Main.priority = 0x2;

bios.LNK_dataPump.order = 1;

bios.RTA_dispatcher.order = 0x2;

bios.IDL_cpuLoad.order = 0x3;

bios.trace.bufSeg = prog.get("SDRAM1");

bios.trace.bufLen = 0x800;

bios.SYS.TRACESEG = prog.get("SDRAM1");

bios.HOOK_NDK.initFxn = prog.extern("NDK_hookInit");

bios.HOOK_NDK.createFxn = prog.extern("NDK_hookCreate");

bios.CLK.TIMERSELECT = "Timer 1";

bios.PRD_clock.order = 1;

bios.RTDX.ENABLERTDX = 0;

bios.HWI_INT4.interruptSource = prog.get("GPIO_Interrupt_4");

bios.HWI_INT4.fxn = prog.extern("INT4");

bios.HWI_INT4.useDispatcher = 1;

bios.HWI_INT5.interruptSource = prog.get("GPIO_Interrupt_5");

bios.HWI_INT7.interruptSource = prog.get("GPIO_Interrupt_7");

bios.HWI_INT7.useDispatcher = 1;

bios.HWI_INT8.fxn = prog.extern("EDMA_intDispatcher");

bios.HWI_INT8.useDispatcher = 1;

bios.HWI_INT9.interruptSource = prog.get("MCSP_0_Transmit");

bios.HWI_INT12.interruptSource = prog.get("Host_Port_Host_to_DSP");

bios.HWI_INT12.fxn = prog.extern("HWI_PCI_DSP");

bios.HWI_INT12.useDispatcher = 1;

bios.HWI_INT13.interruptSource = prog.get("MCSP_1_Receive");

bios.HWI_INT13.fxn = prog.extern("i82541Int");

bios.HWI_INT13.useDispatcher = 1;

bios.CACHE_L2.comment = "Generated by Cache Settings in GBL";

bios.CACHE_L2.base = 0xc0000;

bios.GBL.C641XCCFGP = "high";
bios.MEM.REUSECODESPACE = 0;
bios.MEM.STACKSIZE = 0x1000;
bios.MEM.STACKSIZE = 0x4000;
bios.MEM.instance("ISRAM").heapSize = 0x00040000;
bios.PRD.instance("PRD_NDK").order = 1;
bios.TSK.instance("TSK_idle").order = 1;
bios.TSK.instance("TSK_Main").order = 2;
// !GRAPHICAL_CONFIG_TOOL_SCRIPT_INSERT_POINT!

if (config.hasReportedError == false) {
    prog.gen();
}
